Control and Status Registers
These two I/O-mapped registers provide miscellaneous system control and status.
Port 0xE1 (R/W): Bit 7 - Bootloader mode Bit 6 - LPT auto-strobe disable Bit 5 - (RO) DIP switch 2 on (MIRE 1.0 only, reads 0 on MIRE 1.1) Bit 4 - (RO) DIP switch 1 on (32KB SRAM disabled) Bit 3 - (RO) Valid RS-232 levels detected (device attached) Bit 2 - RS-232 generate DCD from DSR (support for incorrectly-wired null modems) Bit 1 - Reserved Bit 0 - Unused output pin control Port 0xE2 (R/W): Bit 7 - (RO) Unused input pin status Bit 6 - (RO) Unused input pin status Bit 5 - (RO) Unused input pin status Bit 4:3 - Reserved Bit 2 - Disable PIC processor registers Bit 1 - Disable version number registers Bit 0 - Disable RS-232 module